Subtract the second operand (snd register) from the first operand (either si4, imm4, imm6 or imm16). (?) Change the borrow bit : set if a signed borrow occured, clear otherwise. Internally, this works just like the SUB instruction but the result is never written.
It also modifies the Equal flag. When the two operands are equal, Eq is set to 1 (otherwise it is reset to 0) and you can use the EQ (EQual) or NEQ (Not EQual) conditions to enable/predicate the following instruction(s).
The CMPU instruction is identical but performs an unsigned comparison.